Required Skills: HBM, CoWoS, 2.5D/3D, RDL, Flip Chip, Wire Bond

Job Description

Job Title: Package Designer
Experience: 5+ Years
Location: San Jose (Work from Office / Onsite)
We’re looking for an experienced Packaging Designer to develop creative and cost-effective IC package designs.

 Job Description:

1. Netlist & BGA creation
2. Substrate stack-up & routing strategy definition
3. Experience with RF, Digital, High-speed & Mixed-signal die
4. Strong knowledge of SI/PI requirements (DDR, SERDES, etc.)
5. Expertise in UCIE (Advanced & Standard), HBM, CoWoS, 2.5D/3D, RDL, Flip Chip, and Wire Bond technologies
6. Familiar with HDI substrates, DRC setup, and OSAT rules
7. Proficiency in Cadence Allegro Package Designer

 Qualification:

• Bachelor’s in Electronics/Electrical Engineering
• 5+ years in IC package design & development